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Where does the Z80 processor start executing from?
The Next CEO of Stack OverflowHow did the Z80 instruction set differ from the 8080?Why does the Z80 have a half-carry bit?How fast is memcpy on the Z80?z80 crashes after executing some instructionsWhy does the Z80 include the RLD and RRD instructions?Why is the Z80's supply pin in the middle of the data pins?Why did TI-8x calculator series use the Z80 processor?Role of the Z80 co-processor in GBA gamesHow do I Interface a PS/2 Keyboard without Modern Techniques?What does ld a,(hl) do in this piece of Z80 ASM code, and why is HL incremented?
Strangely I can't find this information anywhere online -- I've thoroughly looked at the datasheet, and I've searched things like "Z80 program counter initial value" -- but I can't find anything!
My question is simply: when the Z80 just turns on, what value does the program counter take? (i.e., what instruction does it start executing from?)
Logically, I'd assume it initialises to 0, but I want to be sure of this.
z80
asked 2 days ago
Jacob GarbyJacob Garby
2156
New contributor
Jacob Garby is a new contributor to this site. Take care in asking for clarification, commenting, and answering.
Check out our Code of Conduct.
add a comment |
Strangely I can't find this information anywhere online -- I've thoroughly looked at the datasheet, and I've searched things like "Z80 program counter initial value" -- but I can't find anything!
My question is simply: when the Z80 just turns on, what value does the program counter take? (i.e., what instruction does it start executing from?)
Logically, I'd assume it initialises to 0, but I want to be sure of this.
z80
asked 2 days ago
Jacob GarbyJacob Garby
2156
New contributor
Jacob Garby is a new contributor to this site. Take care in asking for clarification, commenting, and answering.
Check out our Code of Conduct.
IIRC when we ran CP/M on a TRS-80 Model I, it required a hardware mod because there was a 4 k ROM starting at address 0, so the OS couldn't gain control of the hardware.
– Ben Crowell
yesterday
add a comment |
Strangely I can't find this information anywhere online -- I've thoroughly looked at the datasheet, and I've searched things like "Z80 program counter initial value" -- but I can't find anything!
My question is simply: when the Z80 just turns on, what value does the program counter take? (i.e., what instruction does it start executing from?)
Logically, I'd assume it initialises to 0, but I want to be sure of this.
z80
asked 2 days ago
Jacob GarbyJacob Garby
2156
New contributor
Jacob Garby is a new contributor to this site. Take care in asking for clarification, commenting, and answering.
Check out our Code of Conduct.
Strangely I can't find this information anywhere online -- I've thoroughly looked at the datasheet, and I've searched things like "Z80 program counter initial value" -- but I can't find anything!
My question is simply: when the Z80 just turns on, what value does the program counter take? (i.e., what instruction does it start executing from?)
Logically, I'd assume it initialises to 0, but I want to be sure of this.
z80
z80
asked 2 days ago
Jacob GarbyJacob Garby
2156
New contributor
Jacob Garby is a new contributor to this site. Take care in asking for clarification, commenting, and answering.
Check out our Code of Conduct.
asked 2 days ago
Jacob GarbyJacob Garby
2156
New contributor
Jacob Garby is a new contributor to this site. Take care in asking for clarification, commenting, and answering.
Check out our Code of Conduct.
asked 2 days ago
Jacob GarbyJacob Garby
2156
New contributor
Jacob Garby is a new contributor to this site. Take care in asking for clarification, commenting, and answering.
Check out our Code of Conduct.
asked 2 days ago
Jacob GarbyJacob Garby
2156
asked 2 days ago
Jacob GarbyJacob Garby
2156
2156
New contributor
Jacob Garby is a new contributor to this site. Take care in asking for clarification, commenting, and answering.
Check out our Code of Conduct.
New contributor
Jacob Garby is a new contributor to this site. Take care in asking for clarification, commenting, and answering.
Check out our Code of Conduct.
Jacob Garby is a new contributor to this site. Take care in asking for clarification, commenting, and answering.
Check out our Code of Conduct.
IIRC when we ran CP/M on a TRS-80 Model I, it required a hardware mod because there was a 4 k ROM starting at address 0, so the OS couldn't gain control of the hardware.
– Ben Crowell
yesterday
add a comment |
IIRC when we ran CP/M on a TRS-80 Model I, it required a hardware mod because there was a 4 k ROM starting at address 0, so the OS couldn't gain control of the hardware.
– Ben Crowell
yesterday
IIRC when we ran CP/M on a TRS-80 Model I, it required a hardware mod because there was a 4 k ROM starting at address 0, so the OS couldn't gain control of the hardware.
– Ben Crowell
yesterday
IIRC when we ran CP/M on a TRS-80 Model I, it required a hardware mod because there was a 4 k ROM starting at address 0, so the OS couldn't gain control of the hardware.
– Ben Crowell
yesterday
add a comment |
1 Answer
1
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Yes, it starts from Zero - like the Intel 8080, the Z80 descends from.
Excerpt from Zilog's March 1978 Product Specification (datasheet), page 2, Pin Description, here the /RESET signal (emphasis mine):
Input, active low. RESET initializes the CPU as follows:
reset interrupt enable flip-flop, clear PC and registers
I and R and set interrupt to 8080A mode.
Similar the description in the 1977 Z80 Technical Manual (03-0029-01) on page 9.
answered 2 days ago
RaffzahnRaffzahn
54.4k6133219
2
Thanks! I actually didn't know that the 8080 started at zero either, but it makes complete sense.
– Jacob Garby
2 days ago
14
@dashnick Many don't just start, but take a vector form a predefined location like 6500 and 6800 start at the vector residing at FFFE/FF, 68k takes the initial PC from Vector 1 (address 4..7). Other do start form some address where the IOC locates a loader record, and so on. Starting from Zero is only one of many ways.
– Raffzahn
2 days ago
8
Intels 8086 employs an interesting combination by starting a offset zero, like 8080/Z80, but in segment FFFF, thus at absolute address FFFF0.
– Raffzahn
2 days ago
3
6502 chip reset starts at a vector found at FFFC. FFFA and FFFE are for interrupts. In other words, reset makes a 6502 doJMP(FFFC). But the 6502 requires 0000-01FF be RAM since those are zero page (basically registers) and the stack.
– Harper
2 days ago
2
PDP-11 starts from a location stored at location 50 (octal), if my memory from 40 years ago is to be trusted, or else a bootstrap program starting at that location. We called it the '50-sequence', and often had to enter it from the console toggle switches.
– user207421
yesterday
|
show 3 more comments
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1 Answer
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Yes, it starts from Zero - like the Intel 8080, the Z80 descends from.
Excerpt from Zilog's March 1978 Product Specification (datasheet), page 2, Pin Description, here the /RESET signal (emphasis mine):
Input, active low. RESET initializes the CPU as follows:
reset interrupt enable flip-flop, clear PC and registers
I and R and set interrupt to 8080A mode.
Similar the description in the 1977 Z80 Technical Manual (03-0029-01) on page 9.
answered 2 days ago
RaffzahnRaffzahn
54.4k6133219
2
Thanks! I actually didn't know that the 8080 started at zero either, but it makes complete sense.
– Jacob Garby
2 days ago
14
@dashnick Many don't just start, but take a vector form a predefined location like 6500 and 6800 start at the vector residing at FFFE/FF, 68k takes the initial PC from Vector 1 (address 4..7). Other do start form some address where the IOC locates a loader record, and so on. Starting from Zero is only one of many ways.
– Raffzahn
2 days ago
8
Intels 8086 employs an interesting combination by starting a offset zero, like 8080/Z80, but in segment FFFF, thus at absolute address FFFF0.
– Raffzahn
2 days ago
3
6502 chip reset starts at a vector found at FFFC. FFFA and FFFE are for interrupts. In other words, reset makes a 6502 doJMP(FFFC). But the 6502 requires 0000-01FF be RAM since those are zero page (basically registers) and the stack.
– Harper
2 days ago
2
PDP-11 starts from a location stored at location 50 (octal), if my memory from 40 years ago is to be trusted, or else a bootstrap program starting at that location. We called it the '50-sequence', and often had to enter it from the console toggle switches.
– user207421
yesterday
|
show 3 more comments
Yes, it starts from Zero - like the Intel 8080, the Z80 descends from.
Excerpt from Zilog's March 1978 Product Specification (datasheet), page 2, Pin Description, here the /RESET signal (emphasis mine):
Input, active low. RESET initializes the CPU as follows:
reset interrupt enable flip-flop, clear PC and registers
I and R and set interrupt to 8080A mode.
Similar the description in the 1977 Z80 Technical Manual (03-0029-01) on page 9.
answered 2 days ago
RaffzahnRaffzahn
54.4k6133219
2
Thanks! I actually didn't know that the 8080 started at zero either, but it makes complete sense.
– Jacob Garby
2 days ago
14
@dashnick Many don't just start, but take a vector form a predefined location like 6500 and 6800 start at the vector residing at FFFE/FF, 68k takes the initial PC from Vector 1 (address 4..7). Other do start form some address where the IOC locates a loader record, and so on. Starting from Zero is only one of many ways.
– Raffzahn
2 days ago
8
Intels 8086 employs an interesting combination by starting a offset zero, like 8080/Z80, but in segment FFFF, thus at absolute address FFFF0.
– Raffzahn
2 days ago
3
6502 chip reset starts at a vector found at FFFC. FFFA and FFFE are for interrupts. In other words, reset makes a 6502 doJMP(FFFC). But the 6502 requires 0000-01FF be RAM since those are zero page (basically registers) and the stack.
– Harper
2 days ago
2
PDP-11 starts from a location stored at location 50 (octal), if my memory from 40 years ago is to be trusted, or else a bootstrap program starting at that location. We called it the '50-sequence', and often had to enter it from the console toggle switches.
– user207421
yesterday
|
show 3 more comments
Yes, it starts from Zero - like the Intel 8080, the Z80 descends from.
Excerpt from Zilog's March 1978 Product Specification (datasheet), page 2, Pin Description, here the /RESET signal (emphasis mine):
Input, active low. RESET initializes the CPU as follows:
reset interrupt enable flip-flop, clear PC and registers
I and R and set interrupt to 8080A mode.
Similar the description in the 1977 Z80 Technical Manual (03-0029-01) on page 9.
answered 2 days ago
RaffzahnRaffzahn
54.4k6133219
Yes, it starts from Zero - like the Intel 8080, the Z80 descends from.
Excerpt from Zilog's March 1978 Product Specification (datasheet), page 2, Pin Description, here the /RESET signal (emphasis mine):
Input, active low. RESET initializes the CPU as follows:
reset interrupt enable flip-flop, clear PC and registers
I and R and set interrupt to 8080A mode.
Similar the description in the 1977 Z80 Technical Manual (03-0029-01) on page 9.
answered 2 days ago
RaffzahnRaffzahn
54.4k6133219
edited yesterday
answered 2 days ago
RaffzahnRaffzahn
54.4k6133219
answered 2 days ago
RaffzahnRaffzahn
54.4k6133219
answered 2 days ago
RaffzahnRaffzahn
54.4k6133219
54.4k6133219
2
Thanks! I actually didn't know that the 8080 started at zero either, but it makes complete sense.
– Jacob Garby
2 days ago
14
@dashnick Many don't just start, but take a vector form a predefined location like 6500 and 6800 start at the vector residing at FFFE/FF, 68k takes the initial PC from Vector 1 (address 4..7). Other do start form some address where the IOC locates a loader record, and so on. Starting from Zero is only one of many ways.
– Raffzahn
2 days ago
8
Intels 8086 employs an interesting combination by starting a offset zero, like 8080/Z80, but in segment FFFF, thus at absolute address FFFF0.
– Raffzahn
2 days ago
3
6502 chip reset starts at a vector found at FFFC. FFFA and FFFE are for interrupts. In other words, reset makes a 6502 doJMP(FFFC). But the 6502 requires 0000-01FF be RAM since those are zero page (basically registers) and the stack.
– Harper
2 days ago
2
PDP-11 starts from a location stored at location 50 (octal), if my memory from 40 years ago is to be trusted, or else a bootstrap program starting at that location. We called it the '50-sequence', and often had to enter it from the console toggle switches.
– user207421
yesterday
|
show 3 more comments
2
Thanks! I actually didn't know that the 8080 started at zero either, but it makes complete sense.
– Jacob Garby
2 days ago
14
@dashnick Many don't just start, but take a vector form a predefined location like 6500 and 6800 start at the vector residing at FFFE/FF, 68k takes the initial PC from Vector 1 (address 4..7). Other do start form some address where the IOC locates a loader record, and so on. Starting from Zero is only one of many ways.
– Raffzahn
2 days ago
8
Intels 8086 employs an interesting combination by starting a offset zero, like 8080/Z80, but in segment FFFF, thus at absolute address FFFF0.
– Raffzahn
2 days ago
3
6502 chip reset starts at a vector found at FFFC. FFFA and FFFE are for interrupts. In other words, reset makes a 6502 doJMP(FFFC). But the 6502 requires 0000-01FF be RAM since those are zero page (basically registers) and the stack.
– Harper
2 days ago
2
PDP-11 starts from a location stored at location 50 (octal), if my memory from 40 years ago is to be trusted, or else a bootstrap program starting at that location. We called it the '50-sequence', and often had to enter it from the console toggle switches.
– user207421
yesterday
2
2
Thanks! I actually didn't know that the 8080 started at zero either, but it makes complete sense.
– Jacob Garby
2 days ago
Thanks! I actually didn't know that the 8080 started at zero either, but it makes complete sense.
– Jacob Garby
2 days ago
14
14
@dashnick Many don't just start, but take a vector form a predefined location like 6500 and 6800 start at the vector residing at FFFE/FF, 68k takes the initial PC from Vector 1 (address 4..7). Other do start form some address where the IOC locates a loader record, and so on. Starting from Zero is only one of many ways.
– Raffzahn
2 days ago
@dashnick Many don't just start, but take a vector form a predefined location like 6500 and 6800 start at the vector residing at FFFE/FF, 68k takes the initial PC from Vector 1 (address 4..7). Other do start form some address where the IOC locates a loader record, and so on. Starting from Zero is only one of many ways.
– Raffzahn
2 days ago
8
8
Intels 8086 employs an interesting combination by starting a offset zero, like 8080/Z80, but in segment FFFF, thus at absolute address FFFF0.
– Raffzahn
2 days ago
Intels 8086 employs an interesting combination by starting a offset zero, like 8080/Z80, but in segment FFFF, thus at absolute address FFFF0.
– Raffzahn
2 days ago
3
3
6502 chip reset starts at a vector found at FFFC. FFFA and FFFE are for interrupts. In other words, reset makes a 6502 do
JMP(FFFC). But the 6502 requires 0000-01FF be RAM since those are zero page (basically registers) and the stack.– Harper
2 days ago
6502 chip reset starts at a vector found at FFFC. FFFA and FFFE are for interrupts. In other words, reset makes a 6502 do
JMP(FFFC). But the 6502 requires 0000-01FF be RAM since those are zero page (basically registers) and the stack.– Harper
2 days ago
2
2
PDP-11 starts from a location stored at location 50 (octal), if my memory from 40 years ago is to be trusted, or else a bootstrap program starting at that location. We called it the '50-sequence', and often had to enter it from the console toggle switches.
– user207421
yesterday
PDP-11 starts from a location stored at location 50 (octal), if my memory from 40 years ago is to be trusted, or else a bootstrap program starting at that location. We called it the '50-sequence', and often had to enter it from the console toggle switches.
– user207421
yesterday
|
show 3 more comments
Jacob Garby is a new contributor. Be nice, and check out our Code of Conduct.
Jacob Garby is a new contributor. Be nice, and check out our Code of Conduct.
Jacob Garby is a new contributor. Be nice, and check out our Code of Conduct.
Jacob Garby is a new contributor. Be nice, and check out our Code of Conduct.
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IIRC when we ran CP/M on a TRS-80 Model I, it required a hardware mod because there was a 4 k ROM starting at address 0, so the OS couldn't gain control of the hardware.
– Ben Crowell
yesterday